Talk:Intel 8253

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There is no second timer in PCs

The references to two timers is not true. In Intel ICH4 documentation, the timer exists in IO ports 40h..43h, and the same timer is aliased to IO ports 50h..53h for some reason. A very good guess would be that the original IBM PC had it like this too to simplify IO address decoding, but this is just a guess. —Preceding unsigned comment added by 195.148.63.59 (talk) 22:38, 12 January 2010 (UTC)[reply]

IIRC, the second counter was used to sync disk drive writing. If you have ever played around with the PIT clock on a 386, such as using it to play low sample-rate audio streamed from disk to the PC speaker, you will notice this straight away during disk read/writes. --58.164.132.207 (talk) 04:21, 27 November 2012 (UTC)[reply]

Programming considerations - IRQ0 vs INT8

It should be noted that the timer really connects to Interrupt Request line 0 (IRQ0), but as the interrupt controller is configurable, most modern protected mode operating systems reprogram the interrupt controller so that the IRQ0 executes some other interrupt vector than INT8, as it is also an internal CPU Double Fault exception interrupt vector. However the BIOS configures IRQ0 to INT8 at boot, so legacy real mode operating systems still work. —Preceding unsigned comment added by 195.148.63.59 (talk) 22:48, 12 January 2010 (UTC)[reply]

GameWizard used to do something similar in that it rewired interrupts to 80-88 and then called the lower IRQ as required. --58.164.132.207 (talk) 04:33, 27 November 2012 (UTC)[reply]

What about the clock that runs at 14,318,160 Hz?

Does it have a name? It doesn't even seem to be (publicly) documented, but it certainly exists! —Preceding unsigned comment added by 78.150.221.48 (talk) 20:59, 30 September 2010 (UTC)[reply]

See http://wiki.riteme.site/wiki/Crystal_oscillator_frequencies It's a multiple of the NTSC carrier frequency. The original IBM PC already used this clock.

This article is biased too much towards usage in the PC

Expressions like "Port 43h R/W", "The first counter (...) helps generate a clock interrupt." are only valid for the chip in the IBM PC architecture but are not marked a such. The timer was not limited to usage there. This article should probably be split up or rearranged into a part that explains the timer chip itself, and another that shows its usage in the PC.

Also missing: Differences between 8253 and 8254 (the latter supports extra counter and data latch commands and is more flexible with writing counters) and where each variant was used in the PC architecture (8253 in IBM PC and PC XT, 8254 in PC AT and later). — Preceding unsigned comment added by 62.216.205.250 (talk) 14:58, 9 December 2011 (UTC)[reply]