Draft:BrainScaleS

Francesco PAVONE Incontro Human brain project

BrainScaleS

BrainScaleS is a neuromorphic computing platform developed by Heidelberg University. Launched in 2011 as part of the European Union’s Human Brain Project, it aims to replicate biological brain processes through analog circuit architectures, designed to be less energy-intensive than digital calculations. BrainScaleS can simulate brain activity at accelerated speeds, making it a valuable tool for both neuroscience research and artificial intelligence development.

History

2008–2010 (Formation of BrainScaleS): BrainScaleS was developed as a collaborative effort among several European research institutions, with the Kirchhoff Institute for Physics at the University of Heidelberg in Germany playing a central role. The project aimed to create hardware-based neural network simulators capable of operating faster than biological time and scaling to large networks.

2013 (Human Brain Project): In 2013, BrainScaleS became a key component of the Human Brain Project, launched as one of the European Union’s Future and Emerging Technologies (FET) Flagship Projects. This initiative sought to model the human brain and included a neuromorphic computing platform, with BrainScaleS serving as one of its two main hardware systems (alongside SpiNNaker, a digital system developed at the University of Manchester).

2014–2016 (BrainScaleS-1): BrainScaleS-1 was introduced in 2014 through the Human Brain Project. This system used a wafer-scale platform that simulates large neural networks using analog hardware. Designed to operate significantly faster than biological time, BrainScaleS-1 provides researchers with a platform for testing theories of brain function and learning algorithms.

2018 (BrainScaleS-2): BrainScaleS-2 incorporated enhancements in programmability and efficiency. Unlike BrainScaleS-1, which was primarily analog, BrainScaleS-2 integrated digital components to manage a wider variety of neural nodes. This version offers more user control, enabling real-time plasticity and greater adaptability for machine learning and AI research. It continues to be a part of the Human Brain Project's neuromorphic computing platform.

Architecture

BrainScaleS-1 Architecture

The BrainScaleS-1 architecture is a neuromorphic computing system using mixed-signal application-specific integrated circuits (ASICs) called high input count analog Neural Network chips (HICANNs). These chips are designed to emulate spiking neurons and dynamic synapses in a highly configurable manner, allowing them to operate up to 100,000 times faster than biological neurons, depending on system configuration. This speedup enhances efficiency, as the energy required for synaptic transmission is much lower than in traditional neural network simulations.

Key Features of BrainScaleS-1

• Neuron Dynamics: The architecture implements an adaptive exponential leaky integrate-and-fire model, allowing for realistic simulations of neuronal behavior. Each neuron is configurable with specific dynamics, making the system adaptable to various experimental setups.
• Synapse Functionality: Synapses generate analog current pulses based on pre-synaptic spike timing and weight values stored in local static random-access memory (SRAM). They support spike-timing-dependent plasticity (STDP), enabling adaptive learning. Each synapse can connect to multiple pre-synaptic neurons, which can be excitatory or inhibitory.
• Wafer-Scale Integration: The BrainScaleS-1 system consists of a full wafer module that can hold up to 384 HICANNs, allowing for approximately 44 million synapses and 196,608 neurons per wafer, providing high-density integration of neuronal models.
• Configurable Network Topologies: The system supports flexible configurations for network architecture and neuron parameters, making it suitable for a variety of neurocomputational experiments.
• Communication Infrastructure: BrainScaleS-1 uses a fast communication system on the wafer for rapid data transmission. External components are connected using FPGAs, which help manage data transfer efficiently.

BrainScaleS-2 Architecture

The BrainScaleS-2 architecture consists of three primary pillars:

1. Microelectronics as the physical substrate for the emulation of neurons and synapses.
2. Training and learning algorithms supported by dedicated software and hardware, including Spike-Timing-Dependent Plasticity (STDP), Hebbian Learning, Reinforcement Learning, Supervised Learning, Unsupervised Learning, and Evolutionary Algorithms.
3. Advanced resource management and software support across neuromorphic systems in collaboration with sites in Heidelberg and Manchester.

BrainScaleS Software

• Job Submission API: BrainScaleS-2 uses Python through the PyNN API. Code is uploaded to the database, and users select the desired hardware for compilation. The server processes the model with PyNN before placing it in the queue. Once a compiler is available, projects in the queue are compiled. Log data is retained for user reference.
• Python Client for REST API: The Python Client simplifies the use of the REST API, offering convenience functions for authentication, task tracking, and batch submission.
• Model/Experiment Verification: For server security, the system runs a simulation through PyNN to verify code safety, with authentication checks required prior to execution.
• Resource Management Software in Heidelberg and Manchester: The central queue manages tasks for the Neuromorphic Computing system, with hardware sites in Heidelberg and Manchester retrieving, processing, and managing tasks from the queue, including error handling and data management.
• Tools for Exporting Brain Builder Model Descriptions as PyNN Descriptions: Task 9.3.2 streamlines brain models developed by the Brain Simulation Platform for execution on the Neuromorphic Hardware Platform.

Hardware Features

Main Components of the NM-PM1 System

The BrainScaleS-1 system (NM-PM1) includes the following primary components:

• Wafer Modules: Distributed across 5 racks, each with 20 modules. Each module is connected to a wafer power supply and a network switch for communication.
• Compute Cluster: Consists of 20 1U compute server nodes with Intel Core i7-4770 CPUs, 16 GiB of RAM, and 10GbE network interfaces. Storage nodes include SSDs and HDDs for data storage.
• Analog Readout Subsystem: Includes 12 Analog Readout Modules (AnaRMs) that connect to the wafer modules for data acquisition and processing.

Components of the Wafer Module

The wafer module consists of the following key components:

• HICANN Wafer: A 20cm silicon wafer with 384 HICANN chips that contain neuromorphic circuits.
• Wafer Power Supply: A 2kW main power supply board converts -48V to intermediate 10V for powering auxiliary components and FPGAs. Power supplies can be controlled on a per-reticle basis.
• FPGA Communication PCB (FCP): 48 FCP boards interface directly with the wafer’s communication links.
• PowerIt PCB: The main power supply board for voltage regulation and power control of the system.
• Auxiliary Power Supply PCB (AuxPwr): Provides miscellaneous supply voltages for system operation.

Components of the Analog Readout Subsystem

The analog readout subsystem includes:

• Flyspi FPGA PCB: 12 data acquisition PCBs, each containing an Analog-to-Digital Converter (ADC) and FPGA for data processing.
• Analog Frontend PCB (AnaFP): Carries multiplexers and pre-amplifiers to connect the analog readout channels from the wafer to the Flyspi board.
• Analog Readout Mechanical Assembly: A 3U rack-mount assembly for the 12 Flyspi boards, control computer, and USB hubs.

Debugging

Hardware Debugging

Hardware debugging for BrainScaleS involves the following steps:

• Power and Signal Checking: Ensuring that power supplies are functioning correctly and that signal integrity is maintained across the system.

 * Oscilloscopes: Used to monitor and analyze signal behavior throughout the system.
 * Multimeters: Used to measure voltage, current, and resistance to ensure components operate within their expected ranges.

• Clock Synchronization: Ensuring proper synchronization of system components is critical, as timing issues can lead to errors in neuron spike data or communication failures between system elements.

Software Debugging

For debugging on BrainScaleS-2, users can employ several tools and platforms:

• hxtorch Tool: This tool allows users to load neural network data from PyTorch or create custom neural networks using PyNN.

  

  pytorch

• Jupyter Notebooks: BrainScaleS-2 can be operated via Jupyter notebooks, providing an accessible interface for conducting experiments and debugging.

  

  jupyter

• EBRAINS Platform: Users can request access to BrainScaleS via the EBRAINS platform, enabling remote access and seamless integration with the neuromorphic hardware.

See also

• Cognitive architecture
• Neuroscience
• Neuromorphic computing
• SpiNNaker
• Artificial brain
• Neural network (biology)
• Human Brain Project
• Human brain
• Computer architecture