File:Cascaded-AND-OR-diode-logic.svg
Size of this PNG preview of this SVG file: 120 × 110 pixels. Other resolutions: 262 × 240 pixels | 524 × 480 pixels | 838 × 768 pixels | 1,117 × 1,024 pixels | 2,234 × 2,048 pixels.
Original file (SVG file, nominally 120 × 110 pixels, file size: 12 KB)
 | This is a file from the Wikimedia Commons. Information from its description page there is shown below. Commons is a freely licensed media file repository. You can help. |
Summary
| Description |
English: In cascaded AND-OR diode gates, the high voltage level is decreased at least twice. First, the AND gate pull-ups are source resistance for the second stage, thus froming a voltage divider. Second, the OR gate diodes drop the input by VF. |
| Date | |
| Source | Own work |
| Author | Em3rgent0rdr |
Licensing
I, the copyright holder of this work, hereby publish it under the following license:
 
|
This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication. |
| The person who associated a work with this deed has dedicated the work to the public domain by waiving all of their rights to the work worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law. You can copy, modify, distribute and perform the work, even for commercial purposes, all without asking permission.
|
File history
Click on a date/time to view the file as it appeared at that time.
| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 06:24, 16 January 2023 | | 120 × 110 (12 KB) | Em3rgent0rdr | trimmed cropping |
| 06:13, 16 January 2023 |  | 380 × 317 (15 KB) | Em3rgent0rdr | Uploaded own work with UploadWizard |
File usage
The following page uses this file:
