Digital delay generator

A digital delay generator (also known as digital-to-time converter) is a piece of electronic test equipment that provides precise delays for triggering, syncing, delaying, and gating events. These generators are used in many experiments, controls, and processes where electronic timing of a single event or multiple events to a standard timing reference is needed. The digital delay generator may initiate a sequence of events or be triggered by an event. What differentiates it from ordinary electronic timing is the synchronicity of its outputs to each other and the initiating event.

A time-to-digital converter does the inverse function.

Equipment

The digital delay generator is similar to a pulse generator in function, but the timing resolution is much finer, and the delay and width jitter much less.

Some manufacturers, calling their units "digital delay and pulse generators", have added independent amplitude polarity and level control to each of their outputs in addition to delay and width control. Now each channel provides its delay, width, and amplitude control, with the triggering synchronized to an external source or internal rep rate generator - like a general-purpose pulse generator.

Some delay generators provide precise delays (edges) to trigger devices. Others provide accurate delays and widths also to allow a gating function. Some delay generators provide a single timing channel, while others provide multiple timing channels.

Digital delay generator outputs are typically logic level, but some offer higher voltages to cope with electromagnetic interference environments. For very harsh environments, optical outputs and/or inputs with fiber optic connectors are also offered as options by some manufacturers. In general, a delay generator operates in a 50 Ω transmission line environment with the line terminated in its characteristic impedance to minimize reflections and timing ambiguities.

Historically, digital delay generators were single channel devices with delay-only (see DOT reference below). Now, multi-channel units with delay and gate from each channel are the norm. Some allow referencing to other channels and combining the timing of several channels onto one for more complex, multi-triggering applications. Multiple lasers and detectors can be triggered and gated. (see the second reference on "Experimental study of laser ignition of a methane/air mixture by planar laser-induced fluorescence of OH.)" Another example has a channel pumping a laser with a user-selected number of flash lamp pulses. Another channel may be used in Q-switching that laser. A third channel can then be used to trigger and gate a data acquisition or imaging system a distinct time after the laser fires. (see sensorsportal.com reference below)

Pulse selection or pulse picking of a single laser pulse from a stream of laser pulses generated via mode-locking is another valuable feature of some delay generators. Using the mode-locked rate as an external clock to the digital delay generator, one may adjust a delay and width to select a single pulse and synchronize other events to that single pulse.

Uses

A delay generator can also delay and gate high-speed photodetectors in high-speed imaging applications. (see reference on high-speed photography below)

Digital delay generators are usually the heart of the timing for larger systems and experiments. Users generally create a GUI graphical user interface to provide a single control to the entire system or experiment. Digital delay generator manufacturers have added remote programming schemes that facilitate the creation of such GUIs. Industry standards such as GPIB, RS-232, USB and Ethernet are available from a variety of manufacturers.

Experimental fluid dynamics uses digital delay generators to investigate fluid flow. The field of PIV, particle image velocimetry, encompasses several subsets which would use digital delay generators as the main component of its timing where multiple lasers may be triggered. Multiple channels may trigger various lasers. One can also multiplex the timing of several channels onto one channel to trigger or even gate the same device multiple times. A single channel may trigger a laser or gate a camera with multiple, multiplexed pulses. Another useful setup is to have one channel drive flash lamps a preset number of times, followed by a single Q-switch, followed by a delay and gate for the data acquisition or imaging system.

Negative delay is available with digital delay generators that can select some other channel as a reference. This would be useful for applications where an event must occur in advance of the reference. An example would be to allow for opening a shutter before the reference.

A digital delay generator has been used in mass spectrometry.

Multi-trigger digital delay generators

A new development is digital delay generators that have gating and external triggering, dual or multi-trigger capabilities. The gate allows the user to enable outputs and/or triggers with an electronic signal. Some units have gate or trigger capabilities using single or separate connectors. Dual or multi-trigger digital delay generators have several input triggers. These triggers can be selectively used to trigger any or all channels.

The multi-trigger versions have programmable logic controller-type functionality for incorporating interlocks, latches, dynamic delay adjustment, and trigger noise suppression. Triggers are formed by logically combining the inputs and outputs in And, Or, Xor, and Negated forms.

LIDAR applications use digital delay generators. A channel is used to trigger a laser. A second channel provides a delayed gate for the data acquisition system. Gating allows regions of interest to be processed and stored while ignoring the bulk of unwanted data.

Dual-trigger digital delay generators provide two independently triggered digital delay generators in one package. Since benchtop digital delay generators are now multi-channel, it is possible to have two or more input triggers and select the channels that respond to each trigger. An interesting concept to provide dual-trigger capability converts an instrument with separate trigger and gate inputs to allow the gate to operate as a second trigger.

Design

A vital issue in the design of DDGs is to generate triggered delays having crystal-oscillator precision but that are not quantized to the edges of the reference oscillator. There are several techniques used in digital delay generation.

• The most straightforward scheme uses a digital counter and a free-running crystal oscillator to time intervals with 1-clock ambiguity, resulting in output edge jitter of one clock period peak-to-peak relative to an asynchronous trigger. This technique is used in the Quantum Composers and Berkeley Nucleonics instruments.
• Triggered crystal, LC, or delay-line oscillators may be started at trigger time and counted to make coarse delays, followed by an analog fine or "vernier" delay to interpolate between clock periods. An enhancement is to use a phase-locked loop to lock the startable oscillator to a more accurate continuous-running crystal oscillator using a technique that preserves the original trigger alignment. The classic Hewlett Packard 5359A Time Synthesizer used a triggered ECL delay-line oscillator synchronized to a crystal oscillator using a heterodyne phase lock technique; the technique was subsequently used in several Berkeley Nucleonics and LeCroy delay generators. Highland Technology uses a triggered LC oscillator and a DSP phase lock scheme. Jitter below ten ps RMS relative to an external trigger can be achieved.
• It is possible to design an analog-ramp delay generator that spans some tens of nanoseconds of delay range using a current source to charge a capacitor. One can then suspend the ramp current for some integral number of clocks, as timed by a crystal oscillator. The freezing of the ramp extends the range of delays without the requirement to synchronize the oscillator to the trigger. This technique is described in US patent 4,968,907 and was used in the Signal Recovery instrument. Low delay jitter is possible, but leakage current becomes a serious error contributor for delays in the millisecond range.
• A flipflop-based dual-rank synchronizer can be used to synchronize an external trigger to a counter-based delay generator, as in case (1) above. It is then possible to measure the skew between the input trigger and the local clock and adjust the vernier delay on a shot-by-shot basis, to compensate for most of the trigger-to-clock jitter. Jitter in the tens of picoseconds RMS can be achieved with careful calibration. Stanford Research Systems use this technique.

See also

• Programmable logic controller
• Time-to-digital converter

References

• Target Speed Simulator Based on Digital Delay Generator - US Dept of Transportation DOT HS 809 811 Section 4.10.
• "Experimental study of laser ignition of a methane/air mixture by planar laser-induced fluorescence of OH"
• "Measurement of local forcing on a turbulent boundary layer using PIV"
• http://www.sensorsportal.com/HTML/DIGEST/february_06/Pulse_Generator.htm
• "Repetitively pulsed ruby lasers as light sources for high-speed photography applications"
• "Single photon detector module"
• "Lidar remote sensing"
• "Programmable sequence generator with multiple outputs"
• Barnett, Cleon; Cahoon, Erica; Almirall, José R. (2008). "Wavelength dependence on the elemental analysis of glass by Laser Induced Breakdown Spectroscopy". Spectrochimica Acta Part B: Atomic Spectroscopy. 63 (10): 1016–1023. doi:10.1016/j.sab.2008.07.002.
• "Synchrotron timing - multiple channels"

External links

• http://www.berkeleynucleonics.com/resources/575_Multiplexing(1).pdf "Sync'ing, delaying and gating with multiple pulse trains"
• https://www.keysight.com/en/pd-1000001406%3Aepsg%3Apro-pn-5359A/time-synthesizer?nid=-536900193.536882162&cc=US&lc=eng
• http://www.quantumcomposers.com/
• http://www.greenfieldtechnology.com/
• http://www.signalrecovery.com/9650Apage.htm
• http://www.thinksrs.com/products/DG645.htm
• http://www.highlandtechnology.com/DSS/T560DS.html
• http://zone.ni.com/devzone/cda/epd/p/id/6131 FPGA-based