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David Atienza

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Professor
David Atienza Alonso
David Atienza Alonso
Born1978 (age 45–46)
CitizenshipSpain, Switzerland
Board member ofChair of the EDAA (2022-now)
Director of the Section of Electrical Engineering of EPFL (2019–2022)
President of IEEE CEDA (2018–2019)
General Chair of DATE (2017)
Technical Program Chair of DATE (2015)
Gold Member of the Board of Governors IEEE CASS (2010–2012)
Academic background
EducationComputer Engineering
Computer Architecture
Computer Science
Alma materComplutense University of Madrid
IMEC, Leuven, Belgium
Doctoral advisorFrancky Catthoor, and J. Mendias
Academic work
DisciplineEngineering
Computer engineering
Electronics
InstitutionsÉcole Polytechnique Fédérale de Lausanne (EPFL)
Main interestsEmbedded Systems
Electronic Design Automation (EDA)
Low-power Electronics
Wearable Devices
Systems Architecture
Machine Learning
Websitehttps://www.epfl.ch/labs/esl/

David Atienza Alonso is a Spanish/Swiss scientist in the disciplines of computer and electrical engineering. His research focuses on hardware‐software co‐design and management for energy‐efficient and thermal-aware computing systems, always starting from a system‐level perspective to the actual electronic design. He is a full professor of electrical and computer engineering at the Swiss Federal Institute of Technology in Lausanne (EPFL) and the head of the Embedded Systems Laboratory (ESL).[1] He is an IEEE Fellow (2016),[2] and an ACM Fellow (2022).[3]

Career

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David Atienza studied computer science and engineering at Complutense University of Madrid (UCM) and gained his Bachelor's and M.Sc. degrees in 1999 and 2001, respectively. He then received an EU Marie Curie Scholarship to pursue a Ph.D. degree jointly from IMEC in Belgium and UCM in integrated circuit design and embedded systems design. After his graduation in 2005, he joined the Department of Computer Architecture and Engineering of UCM as an assistant professor, receiving the accreditation from the Spanish National Agency for Quality Assessment and Accreditation (ANECA) to become associate professor in late 2006 at UCM. He then became a tenure-track assistant professor at EPFL in 2008, an associate professor in early 2014,[4] and a full professor since 2021.[5]

Research

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At the Embedded Systems Laboratory of EPFL, Prof. David Atienza works on system-level design and management for energy-efficient computing systems. In particular, he investigates co-design and optimization approaches across the complete spectrum of computing systems, from high-performance multi-processor system-on-chip (MPSoC) servers and data centers to low-power Internet-of-Thing (IoT) systems and wearables. His contributions in these areas always target to go beyond hardware and software boundaries for efficient energy use by developing (1) new thermal‐aware optimization and run‐time management of 2D/3D multi‐processor servers and data centers, and (2) cross-layer design methodologies for ultra‐low power smart wearables, edge artificial intelligence (AI) and IoT systems. In these fields, he has co-authored more than 350 publications in peer-reviewed international journals and conferences, several book chapters, and 14 patents.

Prof. Atienza is a pioneer of innovative thermal-aware design and new cooling technologies for system-on-chip architectures. This includes working with IBM on the Microfluidics cooling of computer servers, allowing for multilayer stacks of 3D MPSoCs that can be simultaneously supplied with power and cooling through liquid media.[6][7] A clear example of the long-term impact of Prof. Atienza in this area is the development of the 3D Interlayer Cooling Emulator (3D-ICE) tool,[8] which was used in the design of Aquasar, the first chip-level water-cooled server by IBM. The different versions and updates of 3D-ICE have been available since 2012 as open-source for the research community in computer engineering and EDA tools, and is used for transient thermal modeling of 2D/3D MPSoC designs with multiple cooling technologies by numerous academic and industrial groups worldwide.

Prof. Atienza also works on smart embedded systems and edge computing for autonomous health monitoring and telemedicine. In this area, he has developed important contributions on methodologies for the design and optimization of energy-efficient and adaptive smart wearables and Internet-of-Things (IoT) systems. In particular, he developed a new generation of ultra-low-power and reconfigurable MPSoC architectures for smart wearables based on compressive sensing (in particular for real-time multi-lead ECG processing). Then, in the last years, he has proposed to enhance microcontroller-based architectures with HEAL-WEAR, a novel kernel processing accelerator based on coarse-grained Reconfigurable Array (CGRA) technology to enable multi-parametric smart wearables with edge artificial intelligence (AI) capabilities. This new MPSoC wearable architectures and the related AI algorithms for automatic bio-signal analysis and pathologies detection are licensed and used by a large number of providers of ambulatory, continuous, real-time outpatient management solutions. His current research in this area includes the engineering of next-generation ultra-low-power edge computing systems including emerging nanotechnologies, such as RRAM architectures.[9]

Additional recent industrial applications of the work of Prof. Atienza in energy-efficient algorithms and smart embedded computing systems include research on navigational systems for ClearSpace-1,[10] deep learning for Facebook's recommendation systems,[11] and the latest capsule recognition technology used by Nespresso.[12]

Distinctions

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As Prof. Atienza built up his academic reputation, he was awarded an Oracle External Research Faculty Award (2011),[13] the SIGDA ACM Outstanding New Faculty Award (2012)[14] (first case ever awarded outside the USA), and the IEEE CEDA Early Career Award (2013).[15] He was appointed Editor-in-Chief of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)[16] in the period 2022–2023.

His achievements during his period as professor at EPFL were recognised with an ERC Consolidator Grant (2016),[17] the IEEE Technical Committee on Cyber-Physical Systems (CPS) Mid-Career Award (2018),[18] the DAC Under-40 Innovators Award (2018),[19] and the ICCAD 10-Year Most Influential Paper Award (2020).[20]

In 2016, Prof. Atienza was named IEEE Fellow for “his contributions to design methods and tools for MPSoCs”.[21]

Also, in 2022, he was recognized as an ACM Fellow for "contributions to the design of high-performance integrated systems and ultra-low power edge circuits and architectures".[22]

Selected works

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References

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  1. ^ "ESL". www.epfl.ch/labs/esl.
  2. ^ "2016 elevated fellow" (PDF). IEEE Fellows Directory. Archived from the original (PDF) on December 23, 2015.
  3. ^ "Global computing association names 57 fellows for outstanding contributions that propel technology today". Association for Computing Machinery. January 18, 2023. Retrieved 2023-01-18.
  4. ^ "10 new professors at the two Federal Institutes of Technology". ETH Board.
  5. ^ "22 professors appointed at both ETHs" (PDF). News Admin.CH.
  6. ^ "CMOSAIC". Nano-Tera.ch.
  7. ^ "Integrated power delivery and cooling control for 3D chips using Flow Cell Arrays (FCAs)". EPFL.
  8. ^ "3D-ICE Thermal Emulator for 2D/3D MPSoC Designs". 3D-ICE Open-Source Simulator.
  9. ^ "Exploration of RRAM-based memory solution for edge systems". EPFL.
  10. ^ Petersen, Tanya (29 October 2020). "Deep Learning Algorithms Helping to Clear Space Junk from our Skies". EPFL.
  11. ^ "Automatic Optimization Flow for Facebook's Deep Learning Recommendation Model". EPFL.
  12. ^ "They weren't sure it could be done: an artificially intelligent coffee machine". EPFL. 14 June 2019.
  13. ^ "External Research Office (Past Collaborations)". Oracle Labs.
  14. ^ "Outstanding New Faculty Award". Special Interest Group on Design Automation (SIGDA). 18 June 2019.
  15. ^ "David Atienza". IEEE Council on Electronic Design Automation (CEDA).
  16. ^ "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)". IEEE TCAD.
  17. ^ "ERC Funded Projects: COMPUSAPIEN". European Research Council (ERC).
  18. ^ "Awards in our Technical Committee". IEEE Technical Committee on Cyber-Physical Systems (CPS).
  19. ^ "Nominations for the 57th Design Automation Conference Innovators Under 40 Award Now Open". Design Automation Conference.
  20. ^ "Award Ceremony: ICCAD 2020 Ten Year Retrospective Most Influential Paper Award". EcoCloud. 30 August 2023.
  21. ^ "2016 elevated fellow" (PDF). IEEE Fellows Directory. Archived from the original (PDF) on December 23, 2015.
  22. ^ "ACM Fellows 2022". Association for Computing Machinery.
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